Experience

Detailed breakdown of experiments and impact delivered at each engagement.

Samsung PRISM

Research InternJan 2026 – Present

Bengaluru, India

  • Achieved 84.6% edit-distance accuracy (Levenshtein) on mixed-content IEEE two-column documents (text, figures, formulas) CPU-only via a 4-stage pipeline: 7-step CV normalization (Fidelity Twin dual-output architecture), fine-tuned YOLOv11n layout detector (11 classes, DocLayNet), class-aware model routing, and LaTeX assembly with two-column paracol support.
  • Implemented class-aware specialist routing per detected region: EasyOCR for rich text, Texo (sub-50ms) for mathematical formulas, and TATR + PaddleOCR for tables with HTML-to-LaTeX conversion; reading-order reconstruction via gutter detection and Y-axis clustering; end-to-end latency 25–30s/page on CPU.
PythonYOLOv11EasyOCRPaddleOCRComputer VisionLaTeX

Centre for Development of Telematics (C-DOT)

Agentic AI Engineer InternOct 2025 – Dec 2025

New Delhi, India

  • Architected a distributed LangGraph-orchestrated SOC automation backend integrating correlated multi-host log sources; deployed as Dockerized microservices with Streamlit analyst dashboard, reducing manual triage time by 97%.
  • Built a hybrid RAG retrieval layer over a 350-entry threat intelligence KB achieving full recall on indexed queries; system executed multi-step reasoning across chained security workflows without human intervention.
Certificate
PythonLangGraphChromaDBDockerStreamlitRAG

Central Water Commission (SWRMO Division)

Data Science InternAug 2025 – Sep 2025

New Delhi, India

  • Matched prior LSTM benchmark (88.15% accuracy, MAE = 0.0942m) using XGBoost with lag, rolling, and cyclic feature engineering on IMD rainfall data at substantially lower inference compute — making nationwide operational deployment feasible.
Certificate
PythonXGBoostLSTMPandasTime SeriesFeature Engineering

Bhatiyani Astute Intelligence

Project InternMay 2025 – Jul 2025

Bengaluru, India

  • Built an offline NFC-based tap-to-pay wallet for visually impaired users using ESP32-S3, ESP-IDF, and AES encryption
  • Integrated haptic PIN entry for 2FA, EEPROM-backed credential storage, and physical key support for secure screenless transactions
ESP32ESP-IDFC/C++NFCAES EncryptionEmbedded Systems

Education

RV College of Engineering

B.E. Computer Science & Engineering — CGPA: 8.76/10

Bengaluru, Karnataka

Oct 2023 – July 2027

Delhi Public School

Higher Secondary Education

Bhopal, Madhya Pradesh, India

May 2023